公司名称：誉诚（深圳）实业科技有限公司

Clock managementThe clock controller distributes the clocks coming from different oscillators to the core andthe peripherals. It also manages clock gating for low power modes and ensures clockrobustness. It features:●Clock prescaler: to get the best tradeoff between speed and current consumption, theclock frequency to the CPU and peripherals can be adjusted by a programmableprescaler●Safe clock switching: clock sources can be changed safely on the fly in run modethrough a configuration register.●Clock management: to reduce power consumption, the clock controller can stop theclock to the core, individual peripherals or memory.●Master clock source: three different clock sources can be used to drive the masterclock:–1-24 MHz high-speed external crystal (HSE), that can supply a PLL–16 MHz high-speed internal RC oscillator (HSI), trimmable by software, that cansupply a PLL–Multispeed internal RC oscillator (MSI), trimmable by software, able to generate 7frequencies (65.5 kHz, 131 kHz, 262 kHz, 524 kHz, 1.05 MHz, 2.1 MHz, 4.2 MHz)with a consumption proportional to speed, down to 750 nA typical. When a32.768 kHz clock source is available in the system (LSE), the MSI frequency canbe trimmed by software down to a ±0.5% accuracy