公司名称：誉诚（深圳）实业科技有限公司

USB and HRCAP PLL Module (PLL2)In addition to the main system PLL, these devices also contain a second PLL (PLL2) which can be used toclock the USB and HRCAP peripherals. The PLL supports multipliers of 1 to 15 and has a fixed divide-by-two on its output.PLL2 may be clocked from the following three sources by modifying the PLL2CLKSRCSEL bitsappropriately in the PLL2CTL register:•INTOSC1 (Internal Zero-pin Oscillator 1): This is the on-chip internal oscillator 1 and provides a 10-MHz clock. If used as a clock source for HRCAP, the oscillator compensation routine should be calledfrequently. Because of accuracy requirements, INTOSC1 cannot be used as a clock source for theUSB.•Crystal/Resonator Operation: The (crystal) oscillator enables the use of an external crystal or resonatorattached to the device to provide the time base. The crystal or resonator is connected to the X1/X2pins.•External Clock Source Operation: This mode allows the reference clock to be derived from an externalsingle-ended clock source connected to either GPIO19 or GPIO38. The XCLKINSEL bit in the XCLKregister should be set appropriately to enable the selected GPIO to drive XCLKIN.NOTEFor proper operation of the USB module, PLL2 should be configured to generate a 120-MHzclock. This will be divided by two to yield the desired 60 MHz for the USB peripheral.HRCAP supports a maximum clock input frequency of 120 MH