公司名称：誉诚（深圳）实业科技有限公司

The core of the ADC contains a single 12-bit converter fed by two sample-and-hold circuits. The sample-and-hold circuits can be sampled simultaneously or sequentially. These, in turn, are fed by a total of up to16 analog input channels. The converter can be configured to run with an internal bandgap reference tocreate true-voltage based conversions or with a pair of external voltage references (VREFHI/VREFLO) tocreate ratiometric-based conversions.Contrary to previous ADC types, this ADC is not sequencer-based. The user can easily create a series ofconversions from a single trigger. However, the basic principle of operation is centered around theconfigurations of individual conversions, called SOCs, or Start-Of-Conversions.Functions of the ADC module include:•12-bit ADC core with built-in dual sample-and-hold (S/H)•Simultaneous sampling or sequential sampling modes•Full range analog input: 0 V to 3.3 V fixed, or VREFHI/VREFLO ratiometric. The digital value of the inputanalog voltage is derived by:–Internal Reference (VREFLO = VSSA. VREFHI must not exceed VDDA when using either internal orexternal reference modes.)
•Runs at full system clock, no prescaling required•Up to 16-channel, multiplexed inputs•16 SOCs, configurable for trigger, sample window, and channel•16 result registers (individually addressable) to store conversion values•Multiple trigger sources–S/W – software immediate start–ePWM 1–8–GPIO XINT2–CPU Timer 0, CPU Timer 1, CPU Timer 2–ADCINT1, ADCINT2•9 flexible PIE interrupts, can configure interrupt request after any conversi