公司名称：誉诚（深圳）实业科技有限公司

Memory MapsIn Figure 2-1 through Figure 2-7, the following apply:•Memory blocks are not to scale.•Peripheral Frame 0, Peripheral Frame 1, Peripheral Frame 2, and Peripheral Frame 3 memory mapsare restricted to data memory only. A user program cannot access these memory maps in programspace.•Protected means the order of Write-followed-by-Read operations is preserved rather than the pipelineorder.•Certain memory ranges are EALLOW protected against spurious writes after configuration.•Locations 0x3D 7C80–0x3D 7CC0 contain the internal oscillator and ADC calibration routines. Theselocations are not programmable by the user.•All devices with USB have 2K x16 RAM from 0x40000 to 0x40800. When the clock to the USB moduleis enabled, this RAM is connected to the USB controller and acts as the FIFO RAM. When the clock tothe USB module is disabled, this RAM is remapped to the CPU-accessible address space and can beused as general-purpose RAM